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E2E0043-38-95
Semiconductor MSM63P180
Semiconductor
This version: Sep. 1998 MSM63P180 Previous version: Mar. 1996
4-Bit Microcontroller with Built-in 16K Word PROM and 1024-Dot Matrix LCD Drivers
GENERAL DESCRIPTION
The MSM63P180 is an M6318x series one-time-programmable ROM version product of OLMS63K family, which employs Oki's original CPU core nX-4/250. The MSM63P180 has one-time PROM as internal program memory. The MSM63188 and other mask ROM-version products have mask ROM as internal program memory. The specifications of the MSM63P180 are equal to those of the MSM63188 except for electrical characteristics, packaging, and some functions. The MSM63P180 is used for evaluating the software development of M6318x series products.
FEATURES
* Rich instruction set 439 instructions Transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations, mask operations, bit operations, ROM table reference, external memory transfer, stack operations, flag operations, branch, conditional branch, call/return, control. * Rich selection of addressing modes Indirect addressing of four data memory types, with current bank register, extra bank register, HL register and XY register. Data memory bank internal direct addressing mode. * Processing speed Two clocks per machine cycle, with most instructions executed in one machine cycle. Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock) 1 ms (@ 2 MHz system clock) * Clock generation circuit Low-speed clock High-speed clock
: 32.768 kHz crystal oscillator : 2 MHz (Max.) RC or ceramic oscillator select
* Program memory space 16K words (PROM) Basic instruction length is 16 bits/1 word * Data memory space 3584 nibbles * External data memory space 64 Kbytes (expandable by using an I/O port)
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Semiconductor * Stack level Call stack level Register stack level
MSM63P180
: 16 levels : 16 levels
* I/O ports Input ports: Selectable as input with pull-up resistance/input with pull-down resistance/ high-impedance input Output ports: Selectable as P-channel open drain output/N-channel open drain output/ CMOS output Input-output ports: Selectable as input with pull-up resistance/input with pull-down resistance/high-impedance input Selectable as P-channel open drain output/N-channel open drain output/CMOS output Can be interfaced with external peripherals that use a different power supply than this device uses. Number of ports: Input port : 2 ports 4 bits Output port : 6 ports 4 bits Input-output port : 8 ports 4 bits * Buzzer function Buzzer output Buzzer output modes
: 0.946 to 5.461 kHz (adjustable in 15 steps) : Intermittent sound 1, 2; simple sound; continuous sound
* Melody output function Melody sound frequency Tone length Tempo Note data
: : : :
529 to 2979 Hz 63 types 15 types Resides in the program memory
* LCD driver Number of segments : 1024 Max. (64 SEG 16 COM) 1/1 to 1/16 duty 1/4 or 1/5 bias (regulator built-in) Selectable as all-on mode/all-off mode/power down mode/normal display mode Adjustable contrast * Multiplier/divider circuits Multiplier : (8 bits) (8 bits) AE Product (16 bits) Divider : (16 bits) / (8 bits) AE Quotient (16 bits), Remainder (8 bits) * Reset function Reset through RESET pin Power-on reset Reset by low-speed oscillation halt * Battery check Low-voltage supply check Criterion voltage
: Selectable as 2.2 V or 2.8 V
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Semiconductor * Power supply backup Backup circuit (voltage multiplier) enables operation at 1.45 V minimum
MSM63P180
* Timers and counter 8-bit timer 4 Selectable as auto-reload mode/capture mode/clock frequency measurement mode Watchdog timer 1 Overflows in 2 sec. 100 Hz timer 1 Measurable in steps of 1/100 sec. 15-bit time base counter 1 1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read * Time base capture function Captures the time base counter output values (32, 64, 128, and 256 Hz) upon the rise (fall) of P1.0 and P1.1 * Serial port Mode UART communication speed Clock frequency in synchronous mode Data length * Shift register Shift clock Data length * Interrupt sources External interrupt Internal interrupt
: UART mode, synchronous mode : 1200 bps, 2400 bps, 4800 bps, 9600 bps : 32.768 kHz (internal clock mode), external clock frequency : 5 to 8 bits
: 1x or 1/2x system clock, timer 1 overflow, external clock : 8 bits
:6 : 14 (watchdog timer interrupt is a nonmaskable interrupt)
* Operating voltage When backup used When backup not used
: VDD = 1.45 to 2.7 V : VDD = 2.7 to 5.5 V
* Package: 176-pin plastic LQFP (LQFP176-P-2424-0.50-BK) Product name : MSM63P180-xxxGS-BK (written PROM) MSM63P180-NGS-BK (blanked PROM) xxx indicates a code number.
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Semiconductor
MSM63P180
BLOCK DIAGRAM
An asterisk (*) indicates the port secondary function. indicates that the power is supplied to the circuits corresponding to the signal names inside from VDDI (power supply for interface).
nX-4/250
CBR H L RA PC
TIMING CONTROL
PROM 16KW
VPP VDDH
EBR SP RSP
X
Y C
A G MIE Z BUS CONTROL EXTMEM A0-15* RD* WR* IR
ALU
D0-7*
STACK CAL: 16-level REG: 16-level
INSTRUCTION DECODER
INT 4 RAM 3584N INT INT0* INT1* INT2* INT3* INT4* 2 INT INT 1 RESET RST MULDIV INT TST1 TST2 TST 1 TBC
DATA BUS
TIMER 8bit 4
TM0CAP/TM1CAP* TM0OVF/TM1OVF* T02CK* T13CK* RXC* TXC* RXD* TXD* SIN* SOUT* SCLK* MD
SIO (sync/async)
SFT INT 1 MELODY
MDB BD
BUZZER XT0 XT1 OSC0 OSC1 TBCCLK* HSCLK* TBCAP0* TBCAP1* OSC INT 1 INT 1 WDT OUTPUT PORT 100HzTC TBCAPR INT5 1 INPUT PORT
BDB P0.0-P0.3 P1.0-P1.3 P2.0-P2.3 P3.0-P3.3 P4.0-P4.3 P5.0-P5.3 P6.0-P6.3
BLD
VDDH VDD
BACKUP
P7.0-P7.3 P8.0-P8.3 P9.0-P9.3 PA.0-PA.3 I/O PORT PB.0-PB.3 PC.0-PC.3 PD.0-PD.3 INT0-4 5 BIAS LCD & DSPR PE.0-PE.3 PF.0-PF.3 COM1-16 SEG0-63
CB1 CB2
VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2
LCLK* FRAME*
VDDI VSS
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Semiconductor
PIN CONFIGURATION (TOP VIEW)
(NC) SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 (NC) P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 P3.3 P4.0 P4.1 P4.2 P4.3 (NC) (NC)
SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0
,
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
MSM63P180
176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133
132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89
P5.0 P5.1 P5.2 P5.3 P6.0 P6.1 P6.2 P6.3 P7.0 P7.1 P7.2 P7.3 P8.0 P8.1 P8.2 P8.3 P9.0 P9.1 P9.2 P9.3 PA.0 PA.1 PA.2 PA.3 PB.0 PB.1 PB.2 PB.3 PC.0 PC.1 PC.2 PC.3 PD.0 PD.1 PD.2 PD.3 PE.0 PE.1 PE.2 PE.3 PF.0 PF.1 PF.2 PF.3
Note: Pins marked as (NC) are no-connection pins which are left open.
(NC) COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 VSS VDD1 VDD2 VDD3 VDD4 VDD5 C1 C2 VDDH CB1 CB2 VDD (NC) OSC1 OSC0 RESET XT1 XT0 TST2 TST1 BD BDB MD MDB VPP VDDI (NC)
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
176-Pin Plastic LQFP
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Semiconductor
MSM63P180
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63P180 are described in Table 1. A symbol with a slash (/) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, "--" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an inputoutput pin. Table 1 Pin Descriptions (Basic Functions)
Function Symbol VPP VDD VSS VDD1 VDD2 VDD3 VDD4 Power Supply VDD5 C1 C2 VDDI VDDH CB1 CB2 XT0 XT1 Oscillation OSC0 OSC1 TST1 Test TST2 80 I 76 75 81 I O I Pin 86 73 62 63 64 65 66 67 68 69 87 70 71 72 79 78 -- -- -- -- -- I O Capacitor connection pins for LCD bias generation. A capacitor (0.1 mF) should be connected between C1 and C2. Positive power supply pin for external interface (power supply for input, output, and input-output ports)
Voltage multiplier pin for power Pins to connect a capacitor for voltage multiplier. A capacitor (0.1 mF) should be connected between CB1 and CB2. To enable high-speed oscillation, apply (backup OFF). To disable high-speed oscillation, connect a 1 mF capacitor between VDDH and VSS and between CB1 and CB2. supply backup (internally generated). 2.7 V to VDDH with CB1 and CB2 left open
Type -- -- -- Positive power supply Negative power supply
Description Power supply (+12.5 V) for PROM writing
Power supply pins for LCD bias (internally generated). Capacitors (0.1 mF) should be connected between these pins and -- VSS.
Low-speed clock oscillation pins. A 32.768 kHz crystal should be connected between XT0 and XT1, and CG (12 to 30 pF) should be connected between XT0 and VSS. High-speed clock oscillation pins. A ceramic resonator and capacitors (CL0, CL1) or external oscillation resistor (ROS) should be connected to these pins. Input pins for testing. A pull-down resistor is internally connected to these pins. The user cannot use these pins. Reset input pin. Setting this pin to "H" level puts this device into a reset state.
Reset
RESET
77
I
Then, setting this pin to "L" level starts executing an instruction from address 0000H. A pull-down resistor is internally connected to this pin.
Buzzer Melody
BD BDB MD MDB
82 83 84 85
O O O O
Buzzer output pin (non-inverted output) Buzzer output pin (inverted output) Melody output pin (non-inverted output) Melody output pin (inverted output)
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 Port P3.3 P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 Pin 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 132 131 130 129 128 127 126 125 124 123 122 121 O O O O O O 4-bit output ports. I I Type 4-bit input ports. Description
MSM63P180
Pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit.
P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol P8.0/RD P8.1/WR P8.2 P8.3/INT4 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 PB.0/INT0/ TM0CAP/ TM0OVF PB.1/INT0/ TM1CAP/ TM1OVF PB.2/INT0/T02CK PB.3/INT0/T13CK PC.0/INT1/RXD PC.1/INT1/TXC PC.2/INT1/RXC PC.3/INT1/TXD PD.0/FRAME PD.1/LCLK PD.2/TBCCLK PD.3/HSCLK PE.0/SIN PE.1/SOUT PE.2/SCLK PE.3/INT2 PF.0/INT3 PF.1/INT3 PF.2/INT3 PF.3/INT3 Pin 120 119 118 117 116 115 114 113 112 111 110 109 108 I/O I/O I/O I/O Type 4-bit input-output ports. Description
MSM63P180
In input mode, pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.
107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89
Port
I/O
I/O
I/O
I/O
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Semiconductor Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG0 SEG1 SEG2 LCD SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 Pin 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 O LCD segment signal output pins O Type Description LCD common signal output pins
MSM63P180
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Semiconductor
MSM63P180
Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 LCD SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 Pin 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 O Type Description LCD segment signal output pins
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Semiconductor Table 2 shows the secondary functions of each pin of the MSM63P180. Table 2 Pin Descriptions (Secondary Functions)
Function Symbol PB.0/INT0 PB.1/INT0 PB.2/INT0 PB.3/INT0 PC.0/INT1 PC.1/INT1 PC.2/INT1 PC.3/INT1 PE.3/INT2 External Interrupt PF.0/INT3 PF.1/INT3 PF.2/INT3 PF.3/INT3 P8.3/INT4 P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5 P1.0/INT5 P1.1/INT5 P1.2/INT5 P1.3/INT5 P1.0/TBCAP0 Capture P1.1/TBCAP1 PB.0/TM0CAP PB.1/TM1CAP Pin 108 107 106 105 104 103 102 101 93 92 91 90 89 117 154 153 152 151 150 149 148 147 150 149 108 107 I I I Time base counter capture trigger input pins Timer 0 capture trigger input pin Timer 1 capture trigger input pin I I I I I I Type Description External 0 interrupt input pins.
MSM63P180
The change of input signal level causes an interrupt to occur. The Port B Interrupt Enable register (PBIE) enables or disables an interrupt for each bit. External 1 interrupt input pins. The change of input signal level causes an interrupt to occur. The Port C Interrupt Enable register (PCIE) enables or disables an interrupt for each bit. External 2 interrupt input pin. The change of input signal level causes an interrupt to occur. External 3 interrupt input pins. The change of input signal level causes an interrupt to occur. The Port F Interrupt Enable register (PFIE) enables or disables an interrupt for each bit. External 4 interrupt input pin. The change of input signal level causes an interrupt to occur. External 5 interrupt input pins. The change of input signal level causes an interrupt to occur. The Port 0 Interrupt Enable register (P0IE) and Port 1 Interrupt Enable register (P1IE) enable or disable an interrupt for each bit.
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Semiconductor Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Symbol PB.0/TM0OVF Timer PB.1/TM1OVF PB.2/T02CK PB.3/T13CK LCD External Expansion Oscillation Output PD.1/LCLK PD.2/TBCCLK PD.3/HSCLK PC.0/RXD PC.1/TXC Serial Port PC.2/RXC PC.3/TXD PE.0/SIN Shift Register PE.1/SOUT PE.2/SCLK 102 101 96 95 94 I/O O I O I/O 99 98 97 104 103 O O O I I/O Clock output pin for LCD driver expansion Low-speed oscillation clock output pin High-speed oscillation clock output pin Serial port receive data input pin Sync serial port clock input-output pin. PD.0/FRAME Pin 108 107 106 105 100 Type O O I I O Description Timer 0 overflow flag output pin. Timer 1 overflow flag output pin. External clock input pin for timer 0 and timer 2. External clock input pin for timer 1 and timer 3. Frame output pin for LCD driver expansion
MSM63P180
Transmit clock output when this device is used as a master processor. Transmit clock input when this device is used as a slave processor. Sync serial port clock input-output pin. Receive clock output when this device is used as a master processor. Receive clock input when this device is used as a slave processor. Serial port transmit data output pin. Shift register receive data input pin Shift register transmit data output pin Shift register clock input-output pin. Clock output when this device is used as a master processor. Clock input when this device is used as a slave processor.
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Semiconductor Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Symbol P4.0/A0 P4.1/A1 P4.2/A2 P4.3/A3 P5.0/A4 P5.1/A5 P5.2/A6 P5.3/A7 P6.0/A8 P6.1/A9 P6.2/A10 External Memory P6.3/A11 P7.0/A12 P7.1/A13 P7.2/A14 P7.3/A15 P9.0/D0 P9.1/D1 P9.2/D2 P9.3/D3 PA.0/D4 PA.1/D5 PA.2/D6 PA.3/D7 P8.0/RD P8.1/WR Pin 138 137 136 135 132 131 130 129 128 127 126 125 124 123 122 121 116 115 114 113 112 111 110 109 120 119 O O I/O Data bus for external memory O Type Description Address output bus for external memory
MSM63P180
Read signal output pin for external memory (negative logic) Write signal output pin for external memory (negative logic)
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Semiconductor
MSM63P180
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V) Parameter Power Supply Voltage 1 Power Supply Voltage 2 Power Supply Voltage 3 Power Supply Voltage 4 Power Supply Voltage 5 Power Supply Voltage 6 Power Supply Voltage 7 Power Supply Voltage 8 Power Supply Voltage 9 Input Voltage 1 Input Voltage 2 Output Voltage 1 Output Voltage 2 Output Voltage 3 Output Voltage 4 Output Voltage 5 Output Voltage 6 Output Voltage 7 Output Voltage 8 Storage Temperature Symbol VDD1 VDD2 VDD3 VDD4 VDD5 VDD VDDI VDDH VDDL VIN1 VIN2 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 TSTG Condition Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C Ta = 25C VDD Input, Ta = 25C VDDI Input, Ta = 25C VDD1 Output, Ta = 25C VDD2 Output, Ta = 25C VDD3 Output, Ta = 25C VDD4 Output, Ta = 25C VDD5 Output, Ta = 25C VDD Output, Ta = 25C VDDI Output, Ta = 25C VDDH Output, Ta = 25C -- Rating -0.3 to +1.6 -0.3 to +2.9 -0.3 to +4.2 -0.3 to +5.5 -0.3 to +6.8 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to +6.0 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDD1 + 0.3 -0.3 to VDD2 + 0.3 -0.3 to VDD3 + 0.3 -0.3 to VDD4 + 0.3 -0.3 to VDD5 + 0.3 -0.3 to VDD + 0.3 -0.3 to VDDI + 0.3 -0.3 to VDDH + 0.3 -55 to +150 Unit V V V V V V V V V V V V V V V V V V V C
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Semiconductor
MSM63P180
RECOMMENDED OPERATING CONDITIONS
* When backup is used
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Ceramic Oscillation Frequency External RC Oscillator Resistance Symbol Top VDD VDDI fXT fCM ROS Condition -- -- -- -- VDD = 1.45 to 2.7 V (*1) VDD = 1.45 to 2.7 V (*1) Range 0 to +65 1.45 to 2.7 1.5 to 5.5 30 to 35 200k to 1M 50 to 300 Unit C V V kHz Hz kW
*1 A voltage of 2.7 V or more must be applied to VDDH.
* When backup is not used
(VSS = 0 V) Parameter Operating Temperature Operating Voltage Crystal Oscillation Frequency Ceramic Oscillation Frequency External RC Oscillator Resistance Symbol Top VDD VDDI fXT fCM ROS Condition -- -- -- -- VDD = 2.7 to 5.5 V VDD = 2.9 to 5.5 V VDD = 2.7 to 5.5 V VDD = 2.9 to 5.5 V Range 0 to +65 2.7 to 5.5 1.8 to 5.5 30 to 35 300k to 1M 200k to 2M 50 to 300 30 to 300 Unit C V V kHz Hz kW
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Semiconductor
MSM63P180
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter VDD2 Voltage VDD2 Voltage Temperature Deviation VDD1 Voltage VDD3 Voltage (VDD = VDDI = 1.45 to 5.5 V, VSS = 0 V, Ta = 0 to +65C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit 1/5 bias, 1/4 bias V VDD2 1.7 1.8 1.9 (Ta = 25C) DVDD2 VDD1 VDD3 -- 1/5 bias, 1/4 bias 1/5 bias 1/4 bias (connect VDD3 and VDD2) VDD4 Voltage VDD5 Voltage VDDH Voltage (backup used) Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detect Time External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance External Ceramic Oscillator Capacitance Internal RC Oscillator Capacitance POR Voltage Non-POR Voltage VDD4 VDD5 1/5 bias 1/4 bias 1/5 bias 1/4 bias High-speed clock oscillation stopped VDD = 1.5 V Oscillation start time: within 5 seconds -- -- -- -- CSA2.00MG (Murata MFG.-make) used VDD = 3.0 V -- VDD = 1.5 V -- VDD = 1.5 V -- -- -4 -- mV/C V V Typ.- 0.2 1/2 VDD2 Typ.+ 0.2 Typ.- 0.3 3/2 VDD2 Typ.+ 0.2 Typ.- 0.2 VDD2 Typ.+ 0.2
Typ.- 0.4 2 VDD2 Typ.+ 0.2 Typ.- 0.3 3/2 VDD2 Typ.+ 0.2 Typ.- 0.5 5/2 VDD2 Typ.+ 0.2 Typ.- 0.4 2 VDD2 Typ.+ 0.2 2.8 1.40 1.35 0.1 12 12 -- 8 0.0 0.0 1.2 2.0 -- -- -- -- -- 15 30 12 -- -- -- -- 3.0 -- -- 5.0 30 20 -- 16 0.4 0.7 1.5 3.0
V V
VDDH VSTA VHOLD TSTOP CG CD CL0, 1 COS VPOR1 VPOR2
V 1 V V ms pF pF pF pF V V V V
Notes: 1. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs. 2. "POR" denotes Power On Reset. 3. "VPOR1" indicates that POR occurs when VDD falls from VDD to VPOR1 and again rises up to VDD. 4. "VPOR2" indicates that POR does not occur when VDD falls from VDD to VPOR2 and again rises up to VDD.
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Semiconductor DC Characteristics * When backup is used
MSM63P180
Parameter
Supply Current 1
(VDD = VDDI = 1.5 V, VDDH = 3.0 V, VSS = 0 V, Ta = 0 to +65C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit CPU is in HALT state. mA IDD1 (High-speed clock oscillation -- 10 20 stopped) CPU is in HALT state. LCD is in Power Down mode. (High-speed clock oscillation stopped) CPU is in operating state. (High-speed clock oscillation stopped) CPU is in operation at high-speed oscillation (RC oscillation, ROS = 51 kW) CPU is in operation at high-speed oscillation (Ceramic oscillation, 1 MHz)
Supply Current 2
IDD2
--
8
16
mA 1
Supply Current 3
IDD3
--
100
140
mA
Supply Current 4
IDD4
--
1.5
2
mA
Supply Current 5
IDD5
--
2
3
mA
* When backup is not used
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, Ta = 0 to +65C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit CPU is in HALT state. 5 10 mA IDD1 (High-speed clock oscillation -- stopped) CPU is in HALT state. LCD is in Power Down mode. (High-speed clock oscillation stopped) CPU is in operating state. (High-speed clock oscillation stopped) CPU is in operation at high-speed oscillation (RC oscillation, ROS = 51 kW) CPU is in operation at high-speed oscillation (Ceramic oscillation, 2 MHz)
Parameter
Supply Current 1
Supply Current 2
IDD2
--
4
7
mA
Supply Current 3
IDD3
--
60
120
mA
1
Supply Current 4
IDD4
--
1.5
2
mA
Supply Current 5
IDD5
--
3.5
5
mA
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Semiconductor DC Characteristics (continued)
MSM63P180
Parameter Output Current 1 (P2.0 to P2.3) (P3.0 to P3.3) (P4.0 to P4.3) (PF.0 to PF.3) Output Current 2 (BD, BDB) (MD, MDB)
Symbol
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = 0 to +65C unless otherwise specified) MeaCondition Min. Typ. Max. Unit suring Circuit VDDI = 1.5 V -2.1 -5.0 -8.0 0.2 1.0 2.0 -1.8 -5.0 -9.0 0.2 1.0 4.0 -- 4 -- 4 -- 4 -- 4 -- 4 -2.0 -3.5 0.6 1.0 -200 -400 50 100 -- -1.0 -2.5 -4.0 1.0 2.5 4.0 -1.0 -3.0 -5.5 1.0 3.0 5.5 -- -- -- -- -- -- -- -- -- -- -1.2 -2.0 1.2 2.0 -100 -200 100 200 -- -0.2 -1.0 -2.0 2.1 5.0 8.0 -0.2 -1.0 -4.0 1.8 5.0 9.0 -4 -- -4 -- -4 -- -4 -- -4 -- -0.6 -1.0 2.0 3.5 -50 -100 200 400 0.3 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 2 VOH1 = VDDI - 0.5 V VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V
IOH1
Output Current 3 (SEG0 to SEG63) (COM1 to COM16)
Output Current 4 (OSC1)
Output Leakage (P2.0 to P2.3) (P3.0 to P3.3) (P4.0 to P4.3) (PF.0 to PF.3)
***
IOL1 VOL1 = 0.5 V IOH2 VOH2 = VDD - 0.7 V IOL2 IOH3 IOHM3 IOHM3S IOMH3 IOMH3S IOML3 IOML3S IOLM3 IOLM3S IOL3 IOH4R IOL4R IOH4C IOL4C VOL2 = 0.7 V (RC oscillation) VOL4R = 0.5 V (RC oscillation) (ceramic oscillation) VOL4C = 0.5 V (ceramic oscillation) VOH = VDDI IOOH
VDDI = 3.0 V VDDI = 5.0 V VDD = 1.5 V VDD = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VDD = 3.0 V VDD = VDDH = 5.0 V
VOH3 = VDD5 - 0.2 V (VDD5 level) VOHM3 = VDD4 + 0.2 V (VDD4 level) VOHM3S = VDD4 - 0.2 V (VDD4 level) VOMH3 = VDD3 + 0.2 V (VDD3 level) VOMH3S = VDD3 - 0.2 V (VDD3 level) VOML3 = VDD2 + 0.2 V (VDD2 level) VOML3S = VDD2 - 0.2 V (VDD2 level) VOLM3 = VDD1 + 0.2 V (VDD1 level) VOLM3S = VDD1 - 0.2 V (VDD1 level) VOL3 = VSS + 0.2 V (VSS level) VOH4R = VDDH - 0.5 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V
VOH4C = VDDH - 0.5 V VDD = VDDH = 3.0 V
***
IOOL
VOL = VSS
-0.3
--
--
mA
18/35
Semiconductor DC Characteristics (continued)
MSM63P180
Parameter Input Current 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PF.0 to PF.3) *** Input Current 2 (OSC0) Input Current 3 (RESET) Input Current 4 (TST1, TST2)
Symbol
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = 0 to +65C unless otherwise specified) MeaCondition Min. Typ. Max. Unit suring Circuit VIH1 = VDDI (when pulled down) VIL1 = VSS (when pulled up) VDDI = 1.5 V VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V VDDI = 3.0 V VDDI = 5.0 V 2 30 100 -30 -180 -500 0.0 -1.0 -200 -600 0.0 -1.0 0.1 0.75 -1.0 -3.0 10 150 0.5 -1.0 VDD = 1.5 V 30 0.3 1.25 -1.0 VDD = 3.0 V VDD = VDDH = 5.0 V 10 90 250 -10 -90 -250 -- -- -110 -350 -- -- 0.5 1.5 -0.5 -1.5 40 350 1.0 -- 120 0.75 2.5 -- 30 180 500 -2 -30 -100 1.0 0.0 -30 -150 1.0 0.0 1.0 3.0 -0.1 -0.75 80 600 2.0 0.0 300 1.5 4.0 0.0 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA 3
IIH1
IIL1 IIH1Z IIL1Z IIL2 IIH2R IIL2R IIH2C IIL2C
VIH1 = VDDI (in a high impedance state) VIL1 = VSS (in a high impedance state) VIL2 = VSS (when pulled up) VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V
VIH2 = VDDH (RC oscillation) VIL2 = VSS (RC oscillation) VIH2 = VDDH VIL2 = VSS VDD = VDDH = 3.0 V VDD = VDDH = 3.0 V VDD = 1.5 V (ceramic oscillation) VDD = VDDH = 5.0 V (ceramic oscillation) VDD = VDDH = 5.0 V VIH3 = VDD VIL3 = VSS VIH4 = VDD VIL4 = VSS VDD = 3.0 V VDD = VDDH = 5.0 V
IIH3 IIL3 IIH4 IIL4
19/35
Semiconductor DC Characteristics (continued)
MSM63P180
Parameter Input Voltage 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PF.0 to PF.3) Input Voltage 2 (OSC0)
(VDD = VDDI = VDDH = 3.0 V, VSS = 0 V, VDD1 = 1.1 V, VDD2 = 2.2 V, VDD3 = 3.3 V, VDD4 = 4.4 V, VDD5 = 5.5 V, Ta = 0 to +65C unless otherwise specified) MeaSymbol Condition Min. Typ. Max. Unit suring Circuit VDDI = 1.5 V VIH1 VDDI = 3.0 V VDDI = 5.0 V VDDI = 1.5 V VIL1 VDDI = 3.0 V VDDI = 5.0 V VIH2 VIL2 VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = VDDH = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VIH3 VDD = 3.0 V VDD = VDDH = 5.0 V VDD = 1.5 V VIL3 VDD = 3.0 V VDD = VDDH = 5.0 V 1.2 2.4 4.0 0.0 0.0 0.0 2.4 4.0 0.0 0.0 1.35 2.4 4.0 0.0 0.0 0.0 0.05 0.2 0.25 0.05 0.2 0.25 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.1 0.5 1.0 0.1 0.5 1.0 1.5 3.0 5.0 0.3 0.6 1.0 3.0 5.0 0.6 1.0 1.5 3.0 5.0 0.15 0.6 1.0 0.3 1.0 1.5 0.3 1.0 1.5 V V V V V V V V V V V V V V V V V V V V V V 4
Input Voltage 3 (RESET, TST1, TST2)
Hysteresis Width 1 (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (PF.0 to PF.3) Hysteresis Width 2 (RESET, TST1, TST2) Input Pin Capacitance (P0.0 to P0.3) (P1.0 to P1.3) (P8.0 to P8.3) (P9.0 to P9.3) (PF.0 to PF.3)
*** *** ***
VDDI = 1.5 V DVT1 VDDI = 3.0 V VDDI = 5.0 V VDD = 1.5 V DVT2 VDD = 3.0 V VDD = VDDH = 5.0 V
CIN
--
--
--
5
pF
1
20/35
Semiconductor Measuring circuit 1
MSM63P180
(Open) CB1 (Open) CB2 C1 C2 q *1 w OSC1 VSS VDD VDDI VDD1 Ca A Ca, Cb, Cc, Cd, Ce, C12 CG CL0 CL1 Ceramic Resonator VDD2 Cb V VDD3 Cc V V VDD4 VDD5 VDDH Cd V Ce V OSC0 XT0 XT1
CG
C12
32.768 kHz Crystal
: 0.1 mF : 15 pF : 30 pF : 30 pF : CSA2.00MG (2 MHz) CSB1000J (1 MHz) (Murata MFG.-make)
*1 RC Oscillator q ROS w Ceramic Oscillator q CL0 CL1 Ceramic Resonator w
Measuring circuit 2
*3 VIH
*2
INPUT
OUTPUT
A
VIL
VSS
VDD
VDDI
VDD1
VDD2
VDD3
VDD4
VDD5
VDDH
*2 Input logic circuit to determine the specified measuring conditions. *3 Measured at the specified output pins.
21/35
Semiconductor Measuring circuit 3
*4
MSM63P180
A INPUT OUTPUT
VSS
VDD
VDDI
VDD1
VDD2
VDD3
VDD4
VDD5
VDDH
Measuring circuit 4
VIH
Waveform Monitoring *4 INPUT OUTPUT
VIL
VSS
VDD
VDDI
VDD1
VDD2
VDD3
VDD4
VDD5
VDDH
*4 Measured at the specified input pins.
22/35
Semiconductor AC Characteristics (Serial Interface, Serial Port)
MSM63P180
(VDD = 1.45 to 5.5 V, VDDH = 2.7 to 5.5 V, VSS = 0 V, VDDI = 5.0 V, Ta = 0 to +65C unless otherwise specified) (1) Synchronous Communication
Parameter TXC/RXC Input Fall Time TXC/RXC Input Rise Time TXC/RXC Input "L" Level Pulse Width TXC/RXC Input "H" Level Pulse Width TXC/RXC Input Cycle Time TXC/RXC Output Cycle Time tCYC2(O) TXD Output Delay Time RXD Input Setup Time RXD Input Hold Time tDDR tDS tDH Symbol tf tr tCWL tCWH tCYC tCYC1(O) Condition -- -- -- -- -- CPU in operation state at 32 kHz CPU in operation at 2 MHz VDD = VDDH = 2.9 V to 5.5 V Output load capacitance 10 pF -- -- Min. -- -- 0.8 0.8 2.0 -- -- -- 0.5 0.8 Typ. -- -- -- -- -- 30.5 0.5 -- -- -- Max. 1.0 1.0 -- -- -- -- -- 0.4 -- -- Unit ms ms ms ms ms ms ms ms ms ms
Synchronous communication timing ("H" level = 4.0 V, "L" level = 1.0 V)
tCYC TXC (PC.1)/ RXC (PC.2) tr tCWH tDDR TXD (PC.3) tDS RXD (PC.0) tDH tDS 5 V (VDDI) 0 V (VSS) tDDR 5 V (VDDI) 0 V (VSS) tf tCWL 5 V (VDDI) 0 V (VSS)
23/35
Semiconductor (2) UART Communication
MSM63P180
Parameter Transmit Baud Rate Receive Baud Rate
Symbol TBRT RBRT
Condition TBRT = 1/fBRT TCR = 1/fOSC RBRT = 1/fBRT
Min. TBRT-TCR RBRT0.97
Typ. TBRT RBRT
Max. TBRT+TCR RBRT1.03
Unit s s
fBRT: Baud rates (1200, 2400, 4800, 9600 bps)
UART communication timing ("H" level = 4.0 V, "L" level = 1.0 V)
TBRT TXD (PC.3) RBRT RXD (PC.0) 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS)
24/35
Semiconductor AC Characteristics (Serial Interface, Shift Register)
MSM63P180
(VDD = 1.45 to 5.5 V, VDDH = 2.7 to 5.5 V, VSS = 0 V, VDDI = 5.0 V, Ta = 0 to +65C unless otherwise specified)
Parameter SCLK Input Fall Time SCLK Input Rise Time SCLK Input "L" Level Pulse Width SCLK Input "H" Level Pulse Width SCLK Input Cycle Time SCLK Output Cycle Time
Symbol tf tr tCWL tCWH tCYC tCYC1(O) tCYC2(O)
Condition -- -- -- -- -- CPU in operation state at 32 kHz CPU in operation at 2 MHz VDD = VDDH = 2.9 V to 5.5 V Cl = 10 pF -- --
Min. -- -- 0.8 0.8 2.0 -- -- -- 0.5 0.8
Typ. -- -- -- -- -- 30.5 0.5 -- -- --
Max. 1.0 1.0 -- -- -- -- -- 0.4 -- --
Unit ms ms ms ms ms ms ms ms ms ms
SOUT Output Delay Time SIN Input Setup Time SIN Input Hold Time
tDDR tDS tDH
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
tCYC SCLK (PE.2) tr tCWH tDDR SOUT (PE.3) tDS SIN (PE.0) tDH tDS 5 V (VDDI) 0 V (VSS) tDDR 5 V (VDDI) 0 V (VSS) tf tCWL 5 V (VDDI) 0 V (VSS)
25/35
Semiconductor AC Characteristics (External Memory Interface)
MSM63P180
(VDD = 1.45 to 5.5 V, VDDH = 2.7 to 5.5 V, VSS = 0 V, VDDI = 5.0 V, Ta = 0 to +65C unless otherwise specified) (1) Reading from External Memory
(a) When CPU operates at 32.768 kHz Parameter Read Cycle Time RD Output Delay Time Output Valid Time
External Memory Output Delay Time
Symbol tRC tOE tOHA tDO
Condition -- -- -- --
Min. -- -- -- --
Typ. 61.0 -- -- --
Max. -- 5.0 5.0 5.0
Unit ms ms ms ms
(b) When CPU operates at 2 MHz (VDDH = 2.9 to 5.5 V) Parameter Read Cycle Time RD Output Delay Time Output Valid Time
External Memory Output Delay Time
Symbol tRC tOE tOHA tDO
Condition -- -- -- --
Min. 1.0 -- -- --
Typ. -- -- -- --
Max. -- 100 100 150
Unit ms ns ns ns
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB obj, xadr16 MOVXB obj, [RA] S1 System clock tRC P7 - P4 (A15 - A0) P8.0 (RD) tOE PA, P9 (D7 - D0) Port setup value Input data tDO tOHA Port setup value 5 V (VDDI) 0 V (VSS) Port setup value Address output Port setup value 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) S2 S1 S2 S1 S2
26/35
Semiconductor (2) Writing to External Memory
(a) When CPU operates at 32.768 kHz Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. -- -- -- -- -- -- Typ. 61.0 30.5 15.3 15.3 45.8 15.3
MSM63P180
Max. -- -- -- -- -- --
Unit ms ms ms ms ms ms
(b) When CPU operates at 2 MHz (VDDH = 2.9 to 5.5 V) Parameter Write Cycle Time Address Setup Time Write Time Write Recovery Time Data Setup Time Data Hold Time Symbol tWC tAS tW tWR tDS tDH Condition -- -- -- -- -- -- Min. 1.0 0.4 0.2 0.2 0.7 0.2 Typ. -- -- -- -- -- -- Max. -- -- -- -- -- -- Unit ms ms ms ms ms ms
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB [RA], obj or MOVXB xadr16, obj S1 System clock tWC P7 - P4 (A15 - A0) PA, P9 (D7 - D0) Port setup value Address output Port setup value 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) 5 V (VDDI) 0 V (VSS) tAS tW tWR S2 S1 S2 S1 S2
Port setup value
Output data tDS tDH
Port setup value
P8.1 (WR)
27/35
Semiconductor
MSM63P180
(3) PROM Operations (Applies to Both the Cases of Using and Not Using Backup)
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V) Parameter PROM Power Source Voltage Program Voltage PROM Input Voltage PROM Output Voltage Storage Temperature Symbol VCC VPP VI VO TSTG Condition VCC = VDD = VDDH = VDDI Ta = 25C Ta = 25C VCC input Ta = 25C VCC output Ta = 25C -- Rating -0.3 to +6.7 -0.3 to +14.0 -0.3 to VCC + 0.3 -0.3 to VCC + 0.3 -55 to +150 Unit V V V V C
RECOMMENDED OPERATING CONDITIONS
(VSS = 0 V) Parameter Operating Temperature VCC Power Supply Voltage VPP Power Supply Voltage Input Voltage Symbol TOPEP VCC VPP VIH VIL Condition -- -- When data is read When data is written -- -- Range 0 to +65 4.75 to 5.25 4.75 to 5.25 12.0 to 13.5 4.0 to VCC 0 to 1.0 Unit C V V V V V
28/35
Semiconductor
MSM63P180
ELECTRICAL CHARACTERISTICS
(1) Read Operation DC Characteristics
Parameter VCC Power Supply Current (Standby) VCC Power Supply Current (Operating) Input Voltage Output Current Symbol ICC1 ICC2 VIH VIL IOH IOL VOL = 0.5 V (VCC = VPP = 5 V 5%, Ta = 25C 5C unless otherwise specified) Min. Typ. Max. Condition Unit CE = VIH CE = VIL -- -- VOH = VCC - 0.5 V -- -- 4.0 0 -8 2 -- -- -- -- -4 4 35 100 VCC 1.0 -2 8 mA mA V V mA mA
AC Characteristics
(VCC = 5 V 5%, VPP = VCC, Ta = 0 to +65C unless otherwise specified) Parameter Address Access Time CE Access Time OE Access Time Output Disable Time Symbol tACC tCE tOE tDF Condition OE = CE = VIL OE = VIL CE = VIL CE = VIL Min. -- -- -- 0 Typ. -- -- -- -- Max. 120 120 50 40 Unit ns ns ns ns
Measurement conditions: Input pulse level ............ 0.45 V to 4.55 V Input rise/fall time ....... 5 ns Threshold level .............. input 0.8 V, 2 V/output 0.8 V, 2 V
29/35
Semiconductor
MSM63P180
5V Address Input 0V
CE tCE
5V 0V
OE tOE tACC Data Output tDF
5V 0V
5V 0V
30/35
Semiconductor (2) Write Operation DC Characteristics
MSM63P180
(VSS = 0 V, VCC = 5 V 5%, VPP = 12.5 V 0.5 V, Ta = 25C 5C unless otherwise specified) Min. Typ. Max. Parameter Symbol Condition Unit VPP Power Supply Current VCC Power Supply Current Input Voltage Output Current IPP ICC VIH VIL IOH IOL CE = VIH -- -- -- VOH = VCC - 0.5 V VOL = 0.5 V -- -- 4.0 0 -8 2 -- -- -- -- -4 4 50 100 VCC 1.0 -2 8 mA mA V V mA mA
AC Characteristics
(VSS = 0 V, VCC = 5 V 5%, VPP = 12.5 V 0.5 V, Ta = 25C 5C unless otherwise specified) Parameter Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE Output Floating Delay Time VPP Power Source Setup Time Initial Program Pulse Width Additional Program Pulse Width OE Output Effective Delay Time Symbol tAS tOES tDS tAH tDH tDFP tVS tPW tOPW tOE Condition -- -- -- -- -- -- -- 6 V 0.25 V 6 V 0.25 V -- Min. 2.0 2.0 2.0 0 2.0 0 2.0 0.95 2.85 -- Typ. -- -- -- -- -- -- -- 1.0 -- -- Max. -- -- -- -- -- 130 -- 1.05 78.75 150 Unit ms ms ms ms ms ns ms ms ms ns
Measurement conditions: Input pulse level ............ 0.45 V to 4.55 V Input rise/fall time ....... less than 20 ns Threshold level .............. input 0.8 V, 2 V/output 0.8 V, 2 V
31/35
Semiconductor
MSM63P180
5V Address Input Address N 0V tAS Data Input-Output tDS VPP 0V tVS Data Input tDH tOE tAH 5V Data Output 0V tDFP 12.5 V
5V CE 0V tPW tOPW 5V OE 0V tOES
32/35
Semiconductor
MSM63P180
APPLICATION CIRCUITS
*RC oscillation is selected as high-speed oscillation. *Ports are powered from external memory power source. *Cv is an IC power supply bypass capacitor. *Values of Ca, Cb, Cc, Cd, Ce, Cv, C12, and CG are for reference only. SEG0-63 OSC0 ROS 12 to 30 pF 3V 1.5 V XT1 VDDH VDD Cv 0.1 mF Open Ce Cd Cc Cb Ca C12 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF Push SW Open Buzzer C2 RESET TST1 TST2 MD MDB VSS CB1 CB2 VDD5 VDD4 VDD3 VDD2 VDD1 C1 OSC1
LCD
Crystal 32.768 kHz CG
COM1-16 XT0
P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0
Key Matrix (8 8)
MSM63P180
P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0 VPP VDDI VDD P4-7 P9, PA P8.0 P8.1 A15-0 External D7-0 Memory RD (64K 8 bits) WR VSS 5.0 V Open
Note: VDDI is the power supply pin for the input, output, and input-output ports. Be sure to connect the VDDI pin either to the positive power supply pin (VDD) of this device or to the positive power supply pin of the external memory. Application Circuit Example with Power Supply Backup
33/35
Semiconductor
MSM63P180
APPLICATION CIRCUITS (continued)
*Ceramic oscillation is selected as high-speed oscillation. *Ports, external memory, and IC share their power supply. *Cv is an IC power supply bypass capacitor. *Values of Ca, Cb, Cc, Cd, Ce, Cv, C12, CG, CL0, and CL1 are for reference only. SEG0-63 OSC0 OSC1 CL1 30 pF CL0 30 pF Ceramic Resonator
LCD
Crystal 32.768 kHz CG VDD 5.0 V
COM1-16 XT0 XT1 VDDH VDD
12 to 30 pF
Cv Ce Cd Cc Cb Ca
0.1 mF Open 0.1 mF 0.1 mF 0.1 mF 0.1 mF 0.1 mF
CB1 CB2 VDD5 VDD4 VDD3 VDD2 VDD1 C1
P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0
Key Matrix (8 8)
MSM63P180
C12
0.1 mF Push SW Open C2 RESET TST1 TST2 MD MDB VSS
P1.3 P1.2 P1.1 P1.0 P0.3 P0.2 P0.1 P0.0 VPP VDDI VDD P4-7 P9, PA P8.0 P8.1 A15-0 External D7-0 Memory RD (64K 8 bits) WR VSS Open VDD
Buzzer
Note: VDDI is the power supply pin for the input, output, and input-output ports. Be sure to connect the VDDI pin either to the positive power supply pin (VDD) of this device or to the positive power supply pin of the external memory. Application Circuit Example with No Power Supply Backup
34/35
Semiconductor
MSM63P180
PACKAGE DIMENSIONS
(Unit : mm) LQFP176-P-2424-0.50-BK
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.87 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 35/35

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